1. Field of the Invention
The present invention relates to a structure of a plurality of thin film transistors wherein a peripheral circuit on a glass substrate of a liquid crystal display panel, and a crystal display device having the same. In particularly, the present invention relates to suppress the over current at edge lines of polycrystalline silicon thin film that constitute channel, and the present invention relates to reduce a hump in I-V characteristics of the thin film transistors.
2. Description of the Prior Art
A polycrystalline silicon thin film transistors (polysilicon TFTs) formed on a glass substrate having a same structure as silicon on insulator (SOI) structure. So, the polysilicon TFTs having same electrical characteristics such as a SOI device. Thin film channel layer (active layer) can be work fully-depleted, so that reducing a voltage difference between the rises from off-state to on-state. That is one of the same electrical characteristics such as a SOI device.
Generally, as above TFTs are formed on a transparent substrate (glass plate). TFTs are uses to driven element for a display device such as liquid crystal display (LCD) device. It can be to display fine such as Quarter Video Graphics Array (QVGA) accuracy in 2 inches diagonal area for a display part of mobile phone, for example. It can't be realize by crystalline semiconductor.
As above TFTs are used to switching element for a display region (pixel region) in a liquid crystal display (LCD) device. However, edge conductivity that route to near pattern-edge of semiconductor thin film (polycrystalline silicon thin film) affect to display performance getting worse. Thus, the edge conductivity is cause of off-current enlargement, and the edge conductivity is cause of bad reliability of TFTs, and then image properties getting worse.
Therefore, prior art studied in improvement of TFT structure that is tried to reject as above edge conductivity. Prior art JP3403807B2 is disclosed a part of gate-electrode overlap on a part of semiconductor thin film on the TFT substrate, and the overlap part of gate-electrode is formed the projection part that along the pattern-edge of semiconductor thin film. In prior art TFT has the projection part of gate-electrode that is formed the opposite area which is opposite to the overlap part of near gate-electrode edge, and it suppress to the edge conductivity that route to the near pattern-edge of semiconductor thin film, in patent document 1.    [Patent document 1] JP3403807B2
TFT substrate in pixel region is studied to form the projection part in gate-electrode, so that is suppressing the degradation of display performance cause of the edge conductivity, as shown in patent document 1. However, TFT substrate in peripheral circuit region is not considered, in the fact.
The present invention has been proposed in view of the conventional actual situation, and the object thereof is to provide a structure of optimized TFTs in peripheral circuit region which TFTs are reduced a hump in I-V characteristics for saving power consumption, getting high reliability, reducing variation among the TFTs, and setting a margin at circuit design available. Moreover, the object of present invention is to provide a high-quality LCD device having the structure of optimized TFTs which LCD is excellent image view, saving power consumption, and getting high reliability.